This article is written by Jiya Sarkar, Sister Nivedita University Newtown Kolkata, BBA.LLB (Hons.), 3rd Year during her Internship at LeDroit India
Abstract
To grant legitimacy and assurance of protection for semiconductor layout designed by Integrated Circuits in Electronic Devices, The Government of India passed The Semiconductor Integrated Circuits Layout- Design Act, 2000. Layout designs are basically a fundamental part of the microminiaturisation of microchips; thus, all electronics that are structured based on digital principles are effectively built upon layout designs for semiconductor IC’s and therefore are used as a basis upon which all digital infrastructure is developed today. Protecting semiconductor layouts provides a substantial amount of economic protection.
This article will analyse the statutory framework of the Act, the types of protection available under the Act, the rights conferred on the owner of a semiconductor layout design by the Act, and the mechanisms for enforcing those rights provided for by the Act. The article will also place the Indian Semiconductor Layout-Design Act in the context of the TRIPS Agreement and identify emerging technological challenges associated with semiconductor production; including, for example, AI-assisted chip design, reverse engineering, and other related issues that need addressing.
The article will conclude that while the Act provides a foundation for India’s semiconductor innovation, changes to the Act will need to be made in order to ensure that India’s semiconductor industry continues to keep pace with the global semiconductor industry.
Keywords: Integrated Circuits, Semiconductor Layout Design, Intellectual Property Law, TRIPS Compliance, Microchip Protection, Technology Law.
I. Introduction
Semiconductors act as an unseen engine in the world of digital economic development. Integrated Circuits (ICs), from smartphones to defence systems and from processors for AI-related purposes, provide power to today’s technology ecosystem. A considerable investment of both resources and time goes into the original creation of ICs – in particular, the creation of layout-designs (often referred to as the architectural blueprint for ICs).
Layout-designs occupy a unique space within the framework of intellectual property law (sui generis), and as such, there is no recognition in law that these rights are similar or equal to those of patents or copyrights. To comply with its obligations under the Agreement on Trade-Related Aspects of Intellectual Property Rights (TRIPS) and in response to the evolution of design protection worldwide, India introduced the Semiconductor Integrated Circuits Layout-Design Act (SICLD Act) in 2000.
This Act creates a convergence of IP law protecting technological developments/enhancements through IP compliance within the framework of Government based policies aimed at the maintenance and creation of India’s technological sovereignty.
II. International Background and TRIPS Compliance
Article 35 of the TRIPS agreement requires member countries to protect the layout designs of ICs in accordance with the Washington Treaty of 1989. Although India is not a party to the Washington Treaty, it must create domestic law to comply with its obligations under TRIPS.
The TRIPS framework ensures:
• Protection of original layout-designs
• Minimum 10-year protection period
• Safeguards against commercial exploitation without authorization
India’s SICLD Act was enacted to fulfil these commitments and strengthen its position in the global semiconductor supply chain.
III. Legislative History of the SICLD Act 2000
The SICLD Act (which stands for Semiconductor Integrated Circuits Layout-Design) came into effect in 2000 but only began to be implemented later on. The key feature of this act is that it provides for registration-based protection of semiconductor integrated circuits.
The primary intent of the Act is to address two main objectives:
Encouragement of indigenous semiconductor innovation.
Prevention of unauthorised copying and reverse engineering of semiconductor designs.
Unlike a patent which protects the functional invention of a particular device or product, the SICLD protects the three-dimensional configuration of an electronic circuit as embodied in an integrated circuit.
IV. Important Definitions and Scope of Protection
A. Integrated Circuit: Integrated circuits are classified as integrated circuit products that have been constructed using a computer chip and formed by combining several circuit elements on a piece of semiconductor material.
B. Layout-Design: A layout-design is defined to be three-dimensional arrangement of circuit components on an integrated circuit according to subsection 2(h) of the Act. Only layouts that have not been used commercially anywhere in India, or any country with a convention, are eligible for protection as original designs.
C. Exclusions:
Any layout that:
- Would not be an original design
- Has been used commercially for more than 24 months from date of filing; or
- Lacks inherent distinctiveness is not subject to protection under the Act.
The basis for the protection is originality of the layout design.
V. Registration Procedure and Duration of Protection
Protection under the Act is registration-based. The applicant must file:
• A detailed description
• Drawings or photographs
• A statement of novelty
When satisfied, the Registrar will record the layout design in the Register of Layout Designs.
Duration: Protection will last for a period of 10 years from the date of application for registration or commercial use – whichever of these two comes before the other.
This aligns with TRIPS minimum standards.
VI. Rights Conferred and Infringement
A. Exclusive Rights
The registered proprietor enjoys:
1. Reproduce his layout-design;
2. Commercially lease or use his layout-design; and
3. Authorize others to reproduce or commercially lease his layout-design.
B. Infringement
A person infringes the rights of a registered proprietor if:
• He reproduces the layout-design without the consent of the proprietor;
• He imports, sells, or distributes an infringing integrated circuit.
The Act also provides for limited reverse engineering for the purposes of evaluation or teaching, to reflect a balance between technology and the right of the proprietor.
VII. Civil and Criminal Remedies
A. Civil Remedies
The proprietor can obtain any of the following civil remedies:
• An injunction;
• Damages; and
• An accounting for profits made by the infringer.
All of these remedies are consistent with the general mechanisms for enforcing rights in intellectual property.
B. Criminal Liability
The Act indicates that there are penalties of both imprisonment and/or fines for persons who wilfully infringe the rights of a registered proprietor.
Requiring criminal penalties for infringing a registered proprietor’s rights indicates a belief that the piracy of semiconductors is economically serious.
VIII. Comparative Viewpoint
A. USA: As a result of the Semiconductor Chip Protection Act of 1984 (SCPA), the U.S. has offered protection for semiconductor chip topographies since the passage of this act similar to that found in India through a sui generis system. The SCPA recognizes “mask works” as semiconductor chip topographies and grants 10 years of protection resembling that provided in India.
B. European Union: The European Union Directive concerning the Legal Protection of Topographies of Semiconductor Products provides comparable protections to those in place in the U.S. and India. India’s Act is thus aligned with international standards but lacks substantial judicial interpretation on an extensive scale.
IX. Judicial Landscape in India
It should also be pointed out that the number of lawsuits filed under the SICLD Act to date have been very few, with no reported landmark or precedent setting cases. There are multiple reasons for the limited courtroom activity:
• There has been limited domestic semiconductor production,
• There has been limited use of the Act,
• There has been an overreliance on patents and trade secrets instead.
The current void in case law needs to be filled with legal interpretation going forward.
X. Emerging Issues
1. Chip Layouts Made by AI – unclear ownership.
2. International Semiconductor Supply Chains – jurisdictional enforcement problems.
3. Reverse Engineering – delicate balance between innovation and protection.Read more here.
4. India’s Semiconductor Initiative – Increasing awareness of IP importance as Indian government promotes domestic production of semiconductors.
XI. Critical Evaluation
While the Act has achieved compliance with TRIPS, other deficiencies exist including:
– Unclear ownership of analog Very Large-Scale Integration layout designs, which is based on AI-created designs
– Limited enforcement mechanisms to have codified legal pre-emption provisions
– Judicial precedents are scant; therefore, they cannot be relied upon
– Generally low public and private awareness of the innovation-based nature of Very Large-Scale Integration.
In addition, unlike for patent law with respect to originality assessment standards for analog VLSI (Very Large-Scale Integration) layouts not being provided by this law, will likely lead to ambiguity as to how it will be interpreted.
XII. Overlap Between Layout-Design Protection and Trade Secrets: Strategic and Doctrinal Tensions
While Semiconductor Integrated Circuits Layout-Design Act, 2000 (Act) creates a special way to protect semiconductor layout-designs (topographies), but many companies in the tech industry still use trade secret protection to keep these designs confidential rather than registering them. Therefore, it raises a strategic and legal question – why is there under-utilising of a statutory protection system in place of using trade secret protection to protect semiconductor layout designs.
Semiconductor layout-designs, primarily found in Very Large-Scale Integrated (VLSI) systems, take significant time, research, algorithmic development and monetary investment to create. However, use of the Act to protect these semiconductor layout designs requires public disclosure of the layout to the Registry. For businesses operating in global competitive markets, they may view this disclosure as having a significant risk in terms of their business viability. As such, many businesses prefer to use trade secret protection due to the ability to keep the details of the semiconductor layout-design confidential if they protect the layout-designs by taking reasonable steps to ensure the confidentiality of these designs.
In India, there is no law that expressly protects trade secrets. Rather, the law protects trade secrets through contract law and the equitable principle of breach of confidence. Therefore, the lack of a specific law regulating trade secrets will result in trade secret protection being applied in an informal manner, but there will be a level of flexibility with respect to how trade secret protection is used. However, there is an inherent weakness of trade secret protection – reverse engineering.
If a competitor legally obtains and analyses the chip, the original chip manufacturer could lose their exclusive right to market that chip. On the other hand, an exclusive right to protect semiconductor layout-designs registered under the Act provides a seller with enforceable statutory rights, even against someone who independently reproduces their registered semiconductor layout-design.
The balance between confidentiality & registration, is part of the larger policy dilemma between transparency & secrecy. A strong semiconductor ecosystem, requires both adequate proprietary protections, and a way to reward/apply innovation diffusion. If too much emphasis is placed on using trade secrets as a way to protect proprietary information, it could lead to reduced circulation of knowledge; conversely, if too much information is disclosed without sufficient protection through enforcement mechanisms, it could lead to reduced registration of designs.
From a policy perspective, improving the enforcement of the provisions of the LDA will help create an environment whereby the advantage of having registered designs will be better understood and appreciated. Clearer procedural guidelines and processes for expediting registration, as well as better customs enforcement, will lead to semiconductor manufacturers registering more of their layout designs.
Therefore, the relationship between design-layout protection and trade secret protection is not only a matter of technical consideration (which includes understanding the complexion of probable outcomes), but is also part of making strategic decisions regarding competition, innovation and legal risks associated with working in the semiconductor industry.
XIII. Recommendations
1. Clarify ownership of AI-created analog VLSI (Very Large-Scale Integration) layouts through legislative amendment.
2. Encourage the establishment of specialized IP benches in order to adjudicate technical matters.
3. Actively promote the establishment of semiconductor startups.
4. Develop expedited VLSI (Very Large-Scale Integration) layout registration mechanisms.
5. Mirror enforcement with customs authorities to address potential issues with counterfeit imports.
XIII. Conclusion
The Semiconductor Integrated Circuits Layout-Design Act of the year 2000 was India’s strategic introduction to the specialized area of semiconductor intellectual property protection. With digital infrastructure, chip sovereignty and competition between new technologies dominating this era, protecting the layout design aspect of this type of innovation, will require more than simply a legal obligation; it also represents an economic necessity.
The Act provides a foundation that aligns well with TRIPS standards as they have been developed to date. However, the technological dynamics are changing constantly and require continual adaptation through meaningful reform. The extent to which enforcement is improved, ambiguities in the documentation are clarified, and the growing semiconductor ecosystems develop can either cause this legislation to remain as a concept or will enable it to play an important role in establishing India’s status as a leader in technology.
